AMD is approaching the semiconductor industry from both sides of the spectrum.

The Sunnyvale, Calif.-based firm inked a deal Tuesday with Chartered Semiconductor Manufacturing (Quote, Chart) out of Singapore to augment its production of 64-bit chips. The partnership means that AMD will have two facilities now making its Opteron and Athlon64 processors.

Under the contract, Chartered will license portions of AMD's Automated Precision Manufacturing (APM) software suite and will begin integrating it into Fab 7, its 300mm wafer fabrication facility in Singapore before the end of the year. The Chartered-made chips should start coming off the assembly line in 2006.

AMD's APM suite is made up of more than 300 technologies that serve as a fab's "central nervous system" and let the company make its semiconductors faster while wasting less silicon.

Gary Heerssen, senior vice president with AMD's Manufacturing Group, said the company's plans for AMD Fab 36 in Dresden, Germany, which is currently under construction, remain unchanged.

"We intend it to be our benchmark facility for the manufacture of AMD64 products," he said in a statement.

Earlier in the week, AMD' Spansion subsidiary laid out its three-year vision and strategic road map, which includes shrinking its MirrorBit technology to 8 gigabit densities on 65-nanometer lithography. The company also announced plans to develop a new "ORNAND" Flash memory architecture that brings together the best of NOR code execution and NAND data storage capabilities in a single product based on MirrorBit technology.

NOR Flash (as in "not, or") is used in about 15 different memory applications usually for PCs and other desktop hardware. The other kind -- NAND Flash (as in "not, and") -- is used in 40 assorted Flash card applications such as storing music, video and other data.

The first ORNAND products are expected in 2005 with burst-write speeds up to four times faster than current NAND products, AMD said.

By 2007, Spansion said it plans to offer a full portfolio of ORNAND products scaling to 8-gigabit densities. As a result, Spansion expects MirrorBit technology to serve the anticipated $8.9 billion per year data storage market previously served primarily by floating-gate, NAND-type products.

"Now that Spansion has been able to solve some of the inherent scaling and performance problems with nitride-based technology, its new ORNAND architecture is truly a breakthrough," Alan Niebel, CEO and founder of semiconductor market analysis firm Web-Feet Research said. "Being able to add additional features and performance to high-density Flash while reducing cost will help secure Spansion's success in the removable data storage market."

AMD said MirrorBit technology is ideally suited for new applications beyond traditional memory and may be able to create new types of memory solutions that incorporate logic functions like high-security cryptographic processors or integrated memory controllers.

The company has also demonstrated MirrorBit technology's ability to quadruple densities with a working proof-of-concept "QuadBit" test chip in its state-of-the-art Submicron Development Center. In addition, Spansion said this week it has a working test chip prototype based on 65-nanometer MirrorBit technology.

One of the areas Spansion has been applying its technology to is the mobile phone market. The company expects that Flash memory requirements for mainstream phones will jump from about 150 megabits per phone in 2004 to more than 500Mbps in 2007. High-end phones require even more Flash memory, from about 750Mbps today to an estimated 5 gigabits and beyond in 2007.

To beat designers to the punch, the company said it has a new family of Flash memory devices that will simplify designs courtesy of a single Flash memory platform capable of delivering combined code and data storage from 16Mbps to 5Gb.

Based on the density-doubling MirrorBit technology, the forthcoming "RS family" of devices will start with an initial 1.8-volt, 512Mbps product planned for early 2005.

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